General Company | Senior
Design Head
數位IC設計工程師｜ 其他半導體相關業 ｜新店區 ｜Salary negotiable (Regular monthly salary of NT$40,000 or above)
日期：2025/12/29 編號：F000011294
Qualifications
類比IC設計
Responsibilities
1. In charge of Frond-End RF IC design, Analog RF IC design, Digital IC design teams
2. Report to CEO
3. Location in Taiwan
2. Report to CEO
3. Location in Taiwan
Ideal Candidate
1. PhD in EE related
2. 15+ years of relevant experience
3. Strong knowledge in RFIC design, PA design in GaN & GaAs for 5G, CMOS, mmWave, digital design
4. Rich experience in management of IC design teams
5. Good interpersonal skills, written communication and expression skills
6. Good English written and oral communication skills
2. 15+ years of relevant experience
3. Strong knowledge in RFIC design, PA design in GaN & GaAs for 5G, CMOS, mmWave, digital design
4. Rich experience in management of IC design teams
5. Good interpersonal skills, written communication and expression skills
6. Good English written and oral communication skills
Other Requirements
Education:No Limitations
Department:No Limitations
Experience:Over 10 years of experience
Language:
No Limitations
Management Responsibilities:Over 13 Personnel
Business trip:No business trip required
Language:
No Limitations
Employee Benefits
Required by law:
勞保
健保
陪產假
產假
特別休假
育嬰留停
女性生理假
勞退提撥金
產檢假
就業保險
職災保險
其他值得一試的好工作
General Company | Specialty Personnel
研發工程師主管
其他工程研發主管｜光學器材製造業｜新竹市｜Salary negotiable (Regular monthly salary of NT$40,000 or above)
機構設計
軟韌體開發
1. AOI programming, system design and integration
2. Software writing (C, C++, Visual C++, MFC)
3. Requires knowledge related to imaging (image processing, image sensor, image quality, tuning, calibration, camera modules)
4. Software interface program modification.
5. Machine vision software design
2. Software writing (C, C++, Visual C++, MFC)
3. Requires knowledge related to imaging (image processing, image sensor, image quality, tuning, calibration, camera modules)
4. Software interface program modification.
5. Machine vision software design
Listed | Specialty Personnel
FPGA 工程師
數位IC設計工程師｜自動控制相關業｜台北市｜Salary negotiable (Regular monthly salary of NT$40,000 or above)
VHDL
Verilog
RTL Coding
FPGA
上巿櫃IC設計褔利佳
1. FPGA implementation.
2. Integration of related FPGA (high-speed) interfaces.
3. System integration and verification.
4. FPGA Design, C/C++.
5. System simulation.
2. Integration of related FPGA (high-speed) interfaces.
3. System integration and verification.
4. FPGA Design, C/C++.
5. System simulation.
Listed | Specialty Personnel
研發工程師
數位IC設計工程師｜IC設計相關業｜新竹市｜Salary negotiable (Regular monthly salary of NT$40,000 or above)
RTL Coding
工作穩定 公司發展好
影像演算法、數位RTL Coding
General Company | Mid-level
機構技術職/主管職
機構工程師｜電池製造業｜新竹縣市全區 ｜Salary negotiable (Regular monthly salary of NT$40,000 or above)
機構設計
1.電池設計、圖面產出
2.客戶需求確認及尺寸達標、製程可行性評估
3.工廠製程溝通協調
4.產品問題分析及改善方向討論
2.客戶需求確認及尺寸達標、製程可行性評估
3.工廠製程溝通協調
4.產品問題分析及改善方向討論
General Company | Junior
研發主管
其他工程研發主管｜印刷電路板製造業(PCB)｜桃園市｜Salary negotiable (Regular monthly salary of NT$40,000 or above)
新技術開發
1. 新製程設立
2. 新產品導入
3. 重要VE與製程優化
4. Trouble shooting
5. 技術趨勢掌握與交流
6. 客訴處理
2. 新產品導入
3. 重要VE與製程優化
4. Trouble shooting
5. 技術趨勢掌握與交流
6. 客訴處理
General Company | Specialty Personnel
研發工程師/主管
數位IC設計工程師｜IC設計相關業｜苗栗縣市｜Salary negotiable (Regular monthly salary of NT$40,000 or above)
RTL
1. TOP/Block physical implementation (28nm以下), 有12nm/7nm 經驗尤佳
2. IR rail analysis(Voltus/Redhawk)
3. Layout verification (Calibre DRC/LVS)
4. Timing closure (Tempus/PrimeTime/Tweaker)
5. Tcl/Perl/Makefile programming (有此技能者優先考量)
2. IR rail analysis(Voltus/Redhawk)
3. Layout verification (Calibre DRC/LVS)
4. Timing closure (Tempus/PrimeTime/Tweaker)
5. Tcl/Perl/Makefile programming (有此技能者優先考量)
General Company | Specialty Personnel
資深 Cable工程師
產品事業處主管/產品設計師/專案經理｜其他電子零組件相關業｜中和區‧永和區｜Salary negotiable (Regular monthly salary of NT$40,000 or above)
PFMEA
產品開發
績優高頻Cable大廠
1. 接收國內/外客戶需求，制定產品規格提供。
2. 產品設計PFMEA、BOM表、PMP及產品圖面。
3. 線纜/線束產品開發與測試。
4. 材料選型及產品報價。
2. 產品設計PFMEA、BOM表、PMP及產品圖面。
3. 線纜/線束產品開發與測試。
4. 材料選型及產品報價。
Foreign Company | Specialty Personnel
Design Verification Engineer
數位IC設計工程師｜半導體製造業｜新竹縣市全區 ｜Salary negotiable (Regular monthly salary of NT$40,000 or above)
數位ic設計
Product : OLED DDI
1. Develop integrated verification environment.
2. Verify designs with system verilog and system verilog assertion.
3. Develop and optimize verification flow and methodology.
4. Good knowledge of IC design flow.
5. Scripting experience using scripting languages like Perl and Python.
1. Develop integrated verification environment.
2. Verify designs with system verilog and system verilog assertion.
3. Develop and optimize verification flow and methodology.
4. Good knowledge of IC design flow.
5. Scripting experience using scripting languages like Perl and Python.
