- Be familiar with std-cell library design, including the char-flow
- be familiar with device physics, SPICE model, and device variation
- experience with high-speed/ low-power feature of std-cell library circuit optimization (STA analysis)
- experience with FinFET process, 16/12; 7/5nm
- experience of project leading, good communication with team and customers.’
- STDL cell library circuit design, project management, char-flow creating, customer communication.
- EE of MS