5years+ Working experience with M.S In E.E or C.S Strong Technical expertise in CPUL1/L2, Compiler SRAM/Register File architectures and advanced custom circuit implementations.
Familiar with SerDes protocols such as PCIe, USB, SATA, DisplayPort, MIPI, DDR etc. -Familiar with SerDes architecture definition & system modeling/analysis
• Design and implementation of SoCs; • RTL coding, verification, synthesis • Work with FPGA engineers to perform early prototyping • Support test program development, chip validation, and chip life until production maturity. • Collaboration with firmware, software, DV, FPGA, DFT, SoC integration, and backend teams throughout various stages of ASIC development.