數位IC設計工程師

IC Design Engineer
Semiconductor/Electronic
新竹縣市全區
Face-to-face negotiation
General Company | Specialty Personnel 2022/05/16

數位IC設計工程師

IC Design Engineer
Semiconductor/Electronic
新竹縣市全區
Face-to-face negotiation

Qualifications

Verilog

Job Advantage

頂尖跨國IC設計製造商,並具完善的內部訓練與良好的職涯發展機會

Responsibilities

Verilog
數位電路設計
模擬和驗證

Ideal Candidate

1. 有Verilog HDL 實作經驗
2 具有影像處理相關經驗佳

Other Requirements

Education:Master
Department:Electrical engineering
Experience:Over 2 years of experience
Language:
No Limitations
Management Responsibilities:Not need to bear any management responsibilities
Business trip:No business trip required

Employee Benefits

Required by law:哺乳室,週休二日
Benefit system:員工紅利,年終獎金,員工餐廳,零食櫃,咖啡吧,健身器材,社團補助,停車費補助,國內旅遊,國外旅遊,部門聚餐,慶生會,家庭日

Case Number:FC02004617

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