Listed | Specialty Personnel
FPGA 工程師
數位IC設計工程師｜ 自動控制相關業 ｜台北市 ｜Face-to-face negotiation
日期：2025/07/13 編號：F000004094
⭐️ Job Advantage
上巿櫃IC設計褔利佳
Qualifications
VHDL
Verilog
RTL Coding
FPGA
Responsibilities
1. FPGA implementation.
2. Integration of related FPGA (high-speed) interfaces.
3. System integration and verification.
4. FPGA Design, C/C++.
5. System simulation.
2. Integration of related FPGA (high-speed) interfaces.
3. System integration and verification.
4. FPGA Design, C/C++.
5. System simulation.
Ideal Candidate
C、C++、FPGA、RTL、Verilog、VHDL
Other Requirements
Education:Master
Department:No Limitations
Experience:Over 3 years of experience
Language:
No Limitations
Management Responsibilities:Not need to bear any management responsibilities
Business trip:No business trip required
Language:
No Limitations
Employee Benefits
Required by law:
勞保
健保
陪產假
產假
特別休假
育嬰留停
女性生理假
勞退提撥金
產檢假
就業保險
職災保險
其他值得一試的好工作
Listed | Specialty Personnel
研發工程師
數位IC設計工程師｜IC設計相關業｜新竹市｜Face-to-face negotiation
RTL Coding
工作穩定 公司發展好
影像演算法、數位RTL Coding
General Company | Senior
PE Director
其他工程研發主管｜IC設計相關業｜新竹縣市全區 ｜Face-to-face negotiation
OSAT
(1)PE, TE department management
(2) PE, TE company strategic planning
(3) Integration of cross-center engineering issues
(4) Decision-making on supplier engineering issues.
(2) PE, TE company strategic planning
(3) Integration of cross-center engineering issues
(4) Decision-making on supplier engineering issues.
General Company | Senior
類比RD
類比IC設計工程師/數位IC設計工程師｜IC設計相關業｜新竹縣市全區 ｜Face-to-face negotiation
SerDes PHY
CTLE
IP design
Analog IC design
類比IC電路設計
Circuit Design
Serdes Analog Circuit 開發
PCIe high-speed PHY TX(FFE, driver) and RX(CTLE, DFE, CDR) design.
PCIE/ USB PAM4
PCIe high-speed PHY TX(FFE, driver) and RX(CTLE, DFE, CDR) design.
PCIE/ USB PAM4
General Company | Specialty Personnel
IC設計工程師
數位IC設計工程師/類比IC設計工程師｜IC設計相關業｜新竹縣市全區 ｜Face-to-face negotiation
PLL
ASIC
RTL
1.Design and maintain analog circuits
2.Survey and maintain design processes
3.Survey and maintain design tools and flow
4.Help training junior engineers
5.Debugging and measuring chip
2.Survey and maintain design processes
3.Survey and maintain design tools and flow
4.Help training junior engineers
5.Debugging and measuring chip
General Company | Mid-level
生產特助
工業工程師／生產線規劃/品管／品保主管｜汽車及其零件製造業｜海外地區｜Face-to-face negotiation
生產計畫
協助改善產品良率
產品生產製程規劃及工時估算
上市櫃公司
1.具備生產、品保管理相關經驗
2.負責協助單位主管有關廠運營與品質作業
3.跨門溝通協調
2.負責協助單位主管有關廠運營與品質作業
3.跨門溝通協調
General Company | Specialty Personnel
研發工程師
類比IC設計工程師/數位IC設計工程師｜IC設計相關業｜新竹縣市全區 ｜Face-to-face negotiation
IP design
SERDES
PLL
穩定企業
高速 Serdes TX/RX 設計
1) 低抖動鎖相環設計(>5GHz)
2) TX 設計 (>5GHz)
3）RX設計（>5GHz）
1) 低抖動鎖相環設計(>5GHz)
2) TX 設計 (>5GHz)
3）RX設計（>5GHz）
General Company | Specialty Personnel
工程師
數位IC設計工程師｜IC設計相關業｜新竹縣市全區 ｜Face-to-face negotiation
數位電路驗證
數位晶片產品開發
RTL
1.EDA TOOL 客戶端支持服務
2.客戶bug解決
2.必要時支援on-site support
3.需熟悉Verilog及IC Flow
4.具獨立處理問題能力。
2.客戶bug解決
2.必要時支援on-site support
3.需熟悉Verilog及IC Flow
4.具獨立處理問題能力。
General Company | Specialty Personnel
研發工程師主管
其他工程研發主管｜光學器材製造業｜新竹市｜Face-to-face negotiation
機構設計
軟韌體開發
1. AOI programming, system design and integration
2. Software writing (C, C++, Visual C++, MFC)
3. Requires knowledge related to imaging (image processing, image sensor, image quality, tuning, calibration, camera modules)
4. Software interface program modification.
5. Machine vision software design
2. Software writing (C, C++, Visual C++, MFC)
3. Requires knowledge related to imaging (image processing, image sensor, image quality, tuning, calibration, camera modules)
4. Software interface program modification.
5. Machine vision software design
不符合你的期望嗎？
你可以先成為儲備人選，未來若有適合您的職務，我們將會主動與您聯絡。