Engineering/R&D
IC Design
台北市
Face-to-face negotiation
Qualifications
VHDLVerilogRTL CodingFPGA
Job Advantage
上巿櫃IC設計褔利佳
Responsibilities
1. FPGA implementation.
2. Integration of related FPGA (high-speed) interfaces.
3. System integration and verification.
4. FPGA Design, C/C++.
5. System simulation.
2. Integration of related FPGA (high-speed) interfaces.
3. System integration and verification.
4. FPGA Design, C/C++.
5. System simulation.
Ideal Candidate
C、C++、FPGA、RTL、Verilog、VHDL
Other Requirements
Education:Master
Department:No Limitations
Experience:Over 3 years of experience
Management Responsibilities:Not need to bear any management responsibilities
Business trip:No business trip required
Department:No Limitations
Experience:Over 3 years of experience
Language:
No Limitations
Business trip:No business trip required
Employee Benefits
Required by law:勞保 健保 陪產假 產假 特別休假 育嬰留停 女性生理假 勞退提撥金 產檢假 就業保險 職災保險
